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1st National Industry Consortium Conference (NICC)

30 - 31 August, 2025 at Welcomhotel by ITC, Dwarka, Delhi

Purpose of the Industry Consortium Conference

  • As India enters semiconductor and package manufacturing with $10B incentives in Gujarat, Assam and other states, India needs to develop the entire ecosystem from design to R&D to technology development, manufacturing, products, applications and services as well as workforce development, to sustain its initial manufacturing. This ecosystem requires researchers, developers, suppliers for materials and tools, as well as manufacturers and users, from throughout the world. A National Industry Consortium (NICC) is being developed involving 50-100 global companies from the US, EU, Japan, Korea, Taiwan and India and 50 top Indian research academic institutions.

  • The purpose of this 1st National Industry Consortium Conference is to bring the entire team of faculty, students, and industry partners together to set up the consortiums to achieve three goals: Next-gen manufacturing research, workforce development and industry prototypes using pilot lines.

Event
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Event Agenda

Day 1 – August 30, 2025 – Saturday

Inaugural Session

9:00 AM - 10:30 AM

Prof. Rao Tummala

Prof. Rao Tummala

Emeritus Professor, Georgia Tech

Vision of IDSPS Industry Consortium

Ashok Chandak

Ashok Chandak

President, IESA & SEMI India

Management of IDSPS Industry Consortium

Navin Bishnoi

Navin Bishnoi

Marvell

Technical Advisory Board

Inaugural Session

9:00 AM – 10:30 AM

Speakers:
★ Prof. Rao T & Ashok C, Navin B, Prof. Rajat M & Prof. Shreepad K, Ms. P Bharathi, Secretary, DST, Gujarat & Shri Vishal K Dev, Prl. Secy, IT&E, Odisha

IDSPS Industry Consortium: Vision, Strategy, Programs

10:30 AM – 11:30 AM

Speaker:
★ Prof. Rao Tummala

Remarks from the Chairman of Technical Advisory Board of IDSPS

11:30 AM – 12:00 PM

Speaker:
★ Navin Bishnoi

Session 2: Advanced Packaging & Industry Keynote

12:00 PM – 1:00 PM

Speaker:
★ Lee Chee Ping, Lam Research

Lunch

1:00 PM – 2:00 PM

Lunch Break

Technical Sessions (1-7)

2:00 PM – 6:00 PM

1. Package Design (Electrical)
★ 2. Package Design (Mechanical)
★ 3. Materials for Components & Packaging
★ 4. Interconnecting Substrates
★ 5. Integrated Opto-Electronics
★ 6. IC & Board Assembly
★ 7. Thermal Technologies

Networking Dinner

8:00 PM – 9:30 PM

30 Industry Leads & 30 Faculty Leads

Day 2 – August 31, 2025 - Sunday

R&D Programs Continued

9:00 AM – 12:00 PM

R&D Programs Session Chair

Prof. Rao Tummala

Prof. Rao Tummala

Emeritus Professor, Georgia Tech

Phase 1 R&D Programs: Advanced Packaging

9:00 AM – 10:00 AM

9:00 - 9:30 AM: Thermal R&D
Dr. Hari Shanker

Dr. Hari Shanker

Intel

Prof. Somnath Roy

Prof. Somnath Roy

IIT KGP

9:30 - 10:00 AM: Electrical Test R&D
Navin Bishnoi

Navin Bishnoi

Marvell

Prof. Jaynarayan Tudu

Prof. Jaynarayan Tudu

IIT TP

Phase 1 R&D Programs: Power Devices & Systems

10:00 AM – 11:00 AM

10:00 - 10:30 AM: Power Devices R&D
Guru Thalapaneni

Guru Thalapaneni

SiCSem

Prof. Akshay K

Prof. Akshay K

IIT BBS

10:30 - 11:00 AM: Integrated Power Systems R&D
Rajesh Kaushal

Rajesh Kaushal

Delta Electronics

Prof. Shiladri Chakraborty

Prof. Shiladri Chakraborty

IIT B

Phase 2 R&D Programs

11:00 AM – 11:30 AM

11:00 - 11:15 AM: Computing SDA R&D
Prof. Binod Kumar

Prof. Binod Kumar

IIT Jodhpur

11:15 - 11:30 AM: Integrated MEMS & Sensors R&D
Prof. Bhaskar Mitra

Prof. Bhaskar Mitra

IIT Delhi

Chairs of Poster Paper Awards:

11:30 AM - 12:30 PM

 Prof. Nilesh Badwe

Prof. Nilesh Badwe

IIT K

Arun Chandrasekhar

Arun Chandrasekhar

Intel

8. System Level Electrical Test

9:00 AM – 10:30 AM

Speakers:
★ Prof. Jaynarayan Tudu (IITTP), Navin Bishnoi (Marvell)

Session 3: Integrated Power Electronics

10:30 AM – 12:00 PM

Opening Remarks:
★ Prof. Rao Tummala
Keynote:
★ Shalu Agarwal, Yole - Markets & Future of Integrated Power Electronics Industry

Lunch

1:00 PM – 2:00 PM

Lunch Break

Session 4: Pilot Lines at IITGN and IITBBS

2:00 PM – 3:30 PM

Speakers:
★ Vikas Dubey (AP) & Prof. Satyam Parlapalli (IPE)

Session 5: Summary, Actions and Future plans

3:30 PM – 5:00 PM

Speaker:
★ Prof. Rao

Adjourn

5:00 PM

Speakers

Opening Session

Prof. Rao Tummala

Prof. Rao Tummala

Emritus Professor, Georgia Tech

Ashok Chandak

Ashok Chandak

President of IESA

Inaugural Session 1: State Secretaries & Academic Directors

Ms. P Bharathi

Ms. P Bharathi

Secretary, Gujarat

Vishal Kumar Dev

Vishal Kumar Dev

Prl Secretary, Odisha

Anurag Yadav

Anurag Yadav

Prl. Secretary, Uttar Pradesh

Sanjay Kumar

Sanjay Kumar

Spl Chief Secretary, Telangana

Bhaskar Katamneni

Bhaskar Katamneni

Secretary, Andhra Pradesh

Prof. Rajat Moona

Prof. Rajat Moona

IIT Gandhi Nagar

Prof. Rajeev Ahuja

Prof. Rajeev Ahuja

IIT Ropar

Prof. Shreepad Karmalkar

Prof. Shreepad Karmalkar

IIT Bhubaneswar

Prof. B S Murty

Prof. B S Murty

IIT Hyderabad

Prof. Manindra Agrawal

Prof. Manindra Agrawal

IIT Kanpur

Prof. Suman Chakraborty

Prof. Suman Chakraborty

IIT Kharagpur

Dr. Kalidindi N. Satyanarayana

Dr. Kalidindi N. Satyanarayana

IIT Tirupati

Prof. Sathyam Suwas

Prof. Sathyam Suwas

IISc Bangalore

Prof. Shireesh Kedare

Prof. Shireesh Kedare

IIT Bombay

Inaugural Session 2: Semicon Industry Leaders

Dr. Veerappan

Dr. Veerappan

Tessolve

Abhinav Ghosh

Abhinav Ghosh

HCL Tech

Dr. Meena Mishra

Dr. Meena Mishra

DRDO

Shyam Raghunathan

Shyam Raghunathan

Micron

Chet Lenox

Chet Lenox

KLA

Raghu Panicker

Raghu Panicker

Kaynes

Pankaj Gulati

Pankaj Gulati

CDIL

Ravi Bhatkal

Ravi Bhatkal

MacDermid

Sanjay Gupta

Sanjay Gupta

L&T SCT

Arun Chandrasekhar

Arun Chandrasekhar

Intel

Navin Bishnoi

Navin Bishnoi

Marvell

Jairam Sukumar

Jairam Sukumar

Qualcomm

Venkata Rangam Totakura

Venkata Rangam Totakura

Infineon

Rajesh Kaushal

Rajesh Kaushal

Delta Electronics

Hitesh Garg

Hitesh Garg

NXP

Shital Joshi

Shital Joshi

Ansys

Hideo Kudo

Hideo Kudo

Resonac

Ankur Aggarwal

Ankur Aggarwal

Celestial AI

Suresh Ramalingam

Suresh Ramalingam

Applied Materials

Rajeev Khushu

Rajeev Khushu

Texas Instruments

Vivek Tyagi

Vivek Tyagi

Analog Devices

Rangesh Raghavan

Rangesh Raghavan

Lam Research

Dinesh Munireddy

Dinesh Munireddy

Lam Research

Inaugural session 3: Central government

Shri Amitesh Sinha

Shri Amitesh Sinha

CEO, ISM

Shri Shivkumar Kalyanaraman

Shri Shivkumar Kalyanaraman

CEO, Anusandhan National Research Foundation

Shri S Krishnan

Shri S Krishnan

Secretary, Meity

Vision, Programs & Industry Consortium

Prof. Rao Tummala

Prof. Rao Tummala

Emeritus Professor, Georgia Tech

Introducing SEMI & SEMICON India

Dr. Ajit Manocha

Dr. Ajit Manocha

President & CEO, SEMI

R&D Programs: Advanced Packaging

Prof. Rao Tummala

Prof. Rao Tummala

Emeritus Professor, Georgia Tech

Jairam Sukumar

Jairam Sukumar

Qualcomm

Prof. Rohit Sharma

Prof. Rohit Sharma

IIT Ropar

Anil Kumar

Anil Kumar

Ansys

Prof. Tarun Agarwal

Prof. Tarun Agarwal

IIT GN

Ravi Bhatkal

Ravi Bhatkal

MacDermid

Prof. Bhagwati Prasad

Prof. Bhagwati Prasad

IISc

Dr. Venky Sundaram

Dr. Venky Sundaram

3D System Scaling

Prof. Pradeep Dixit

Prof. Pradeep Dixit

IIT B

Ankur Aggarwal

Ankur Aggarwal

Celestial AI

Prof. Naresh Emani

Prof. Naresh Emani

IIT H

Pradeep Vempaty

Pradeep Vempaty

Micron

Prof. Nilesh Badwe

Prof. Nilesh Badwe

IIT K

Dr. Hari Shanker

Dr. Hari Shanker

Intel

Navin Bishnoi

Navin Bishnoi

Marvell

Prof. Somnath Roy

Prof. Somnath Roy

IIT KGP

Prof. JayNarayan Tudu

Prof. JayNarayan Tudu

IIT TP

Prof. Nihar Mohapatra

Prof. Nihar Mohapatra

IIT GN

Poster Paper Reviews- Session chairs

Prof. Nilesh Badwe

Prof. Nilesh Badwe

IIT K

Arun Chandrasekhar

Arun Chandrasekhar

Intel

Phase 1 R&D Programs: Power Devices & Systems

Guru Thalapaneni

Guru Thalapaneni

SiCSem

Prof. Akshay K

Prof. Akshay K

IIT BBS

Rajesh Kaushal

Rajesh Kaushal

Delta Electronics

Prof. Shiladri Chakraborthy

Prof. Shiladri Chakraborthy

IIT B

Phase 2 R&D Programs

Prof. Binod Kumar

Prof. Binod Kumar

IIT Jodhpur

Prof. Bhaskar Mitra

Prof. Bhaskar Mitra

IIT Delhi

Chairs of Poster Paper Awards

Prof. Nilesh Badwe

Prof. Nilesh Badwe

IIT K

Arun Chandrasekhar

Arun Chandrasekhar

Intel

IDSPS Education Programs:

Prof. Nilesh Badwe

Prof. Nilesh Badwe

IIT K

Accelerated Start Up Ecosystem

 Prof. Abhisek D

Prof. Abhisek D

IIT D

Industry Feedback: Company by Company

Prof. Rao Tummala

Prof. Rao Tummala

Emeritus Professor, Georgia Tech

Navin Bishnoi

Navin Bishnoi

Associate Vice President, Marvell

Summary of Feedback

Sarva Harish

Sarva Harish

Chief of Staff, IDSPS

PARTICIPATING INSTITUTIONS

Attendance is limited to the industry consortium members only. A total of about 400 attendees are expected.

Academicians

Directors

Faculty

Students

Industry

Executives

Technical Leaders

Manufacturers

Suppliers

Government

MeitY

DST

States

Technical and Workforce Focus

India requires 12 strategic technologies classified under four key categories—Design, Devices, Packaging, and Systems. To build a sustainable semiconductor ecosystem, national co-development centers are proposed across the country, each supporting research, skill-building, and pilot manufacturing.

  • Design: System, Package, and IC design
  • Devices: CMOS, Power, and Silicon photonics
  • Packaging: Materials, Glass substrates, Co-Packaged Optics, Cu-Cu IC Assembly, and Thermal management
  • Systems: 3D Chiplet logic-memory, Integrated power modules, IoT MEMS, 3D antenna modules for 6G
  • System level electrical test and cooling technologies (conductive, convective, liquid)
  • 12 national co-development centers proposed to drive next-gen R&D and workforce development

OVERVIEW

PURPOSE OF THE INDUSTRY CONSORTIUM CONFERENCE

The Indian Design, Semiconductors, Packaging and Systems Program (IDSPS Program) is a national R&D, educated-workforce and global supply-chain industry program with a critical mass team and infrastructure to build India from ground up in all strategic Design, Semiconductors, Packaging and Systems technologies to provide a sustainable path for manufacturing to grow the semiconductor industry for AI era.

Goals of IDSPS Program:

• Next Gen Strategic Designs & Technologies

• Next gen Educated - Workforce.

• Global Supply - chain partnership to design and demonstrate manufacturable technologies

Why IDSPS Program ?

While the initial ISM-subsidized manufacturing lines in Gujarat and Assam are based on legacy-node technologies, the rest of the advanced world is focusing on 2030 manufacturing technologies, such as optoelectronics for computing, compound semiconductors to form ultrahigh density integrated power modules for electric cars, glass panel chiplet packaging to 1 micron lithography in 3D chiplet architectures, and copper-to copper or hybrid bonding, and assembly, replacing solders, for AI era in view of slowdown of Moore’s Law. These are exactly the same technologies being developed in the IDSPS program to bring India to global level with a sustainable manufacturing path.

CONTACT US

ORGANISER:

IDSPS, IESA

ADDRESS:

Welcomhotel by ITC, Dwarka, Delhi