As India enters semiconductor and package manufacturing with $10B incentives in Gujarat, Assam and other states, India needs to develop the entire ecosystem from design to R&D to technology development, manufacturing, products, applications and services as well as workforce development, to sustain its initial manufacturing. This ecosystem requires researchers, developers, suppliers for materials and tools, as well as manufacturers and users, from throughout the world. A National Industry Consortium (NICC) is being developed involving 50-100 global companies from the US, EU, Japan, Korea, Taiwan and India and 50 top Indian research academic institutions.
The purpose of this 1st National Industry Consortium Conference is to bring the entire team of faculty, students, and industry partners together to set up the consortiums to achieve three goals: Next-gen manufacturing research, workforce development and industry prototypes using pilot lines.



9:00 AM - 10:30 AM

Prof. Rao Tummala
Emeritus Professor, Georgia Tech
Vision of IDSPS Industry Consortium

Ashok Chandak
President, IESA & SEMI India
Management of IDSPS Industry Consortium

Navin Bishnoi
Marvell
Technical Advisory Board
9:00 AM – 10:30 AM
10:30 AM – 11:30 AM
11:30 AM – 12:00 PM
12:00 PM – 1:00 PM
1:00 PM – 2:00 PM
2:00 PM – 6:00 PM
8:00 PM – 9:30 PM
9:00 AM – 12:00 PM

Prof. Rao Tummala
Emeritus Professor, Georgia Tech
9:00 AM – 10:00 AM

Dr. Hari Shanker
Intel

Prof. Somnath Roy
IIT KGP

Navin Bishnoi
Marvell
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Prof. Jaynarayan Tudu
IIT TP
10:00 AM – 11:00 AM

Guru Thalapaneni
SiCSem

Prof. Akshay K
IIT BBS

Rajesh Kaushal
Delta Electronics
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Prof. Shiladri Chakraborty
IIT B
11:00 AM – 11:30 AM

Prof. Binod Kumar
IIT Jodhpur

Prof. Bhaskar Mitra
IIT Delhi
11:30 AM - 12:30 PM

Prof. Nilesh Badwe
IIT K

Arun Chandrasekhar
Intel
9:00 AM – 10:30 AM
10:30 AM – 12:00 PM
1:00 PM – 2:00 PM
2:00 PM – 3:30 PM
3:30 PM – 5:00 PM
5:00 PM

Emritus Professor, Georgia Tech

President of IESA

Secretary, Gujarat

Prl Secretary, Odisha

Prl. Secretary, Uttar Pradesh

Spl Chief Secretary, Telangana

Secretary, Andhra Pradesh

IIT Gandhi Nagar

IIT Ropar

IIT Bhubaneswar

IIT Hyderabad

IIT Kanpur

IIT Kharagpur

IIT Tirupati

IISc Bangalore

IIT Bombay

Tessolve

HCL Tech

DRDO

Micron

KLA

Kaynes

CDIL

MacDermid

L&T SCT

Intel

Marvell

Qualcomm

Infineon

Delta Electronics

NXP

Ansys

Resonac

Celestial AI

Applied Materials

Texas Instruments

Analog Devices

Lam Research

Lam Research

CEO, ISM

CEO, Anusandhan National Research Foundation

Secretary, Meity

Emeritus Professor, Georgia Tech

President & CEO, SEMI

Emeritus Professor, Georgia Tech

Qualcomm

IIT Ropar

Ansys

IIT GN

MacDermid

IISc

3D System Scaling

IIT B

Celestial AI

IIT H

Micron
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IIT K
Intel

Marvell

IIT KGP
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IIT TP

IIT GN
_1.png)
IIT K

Intel

SiCSem

IIT BBS

Delta Electronics
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IIT B

IIT Jodhpur

IIT Delhi
_1.png)
IIT K

Intel
_1.png)
IIT K

IIT D

Emeritus Professor, Georgia Tech

Associate Vice President, Marvell

Chief of Staff, IDSPS
Attendance is limited to the industry consortium members only. A total of about 400 attendees are expected.
India requires 12 strategic technologies classified under four key categories—Design, Devices, Packaging, and Systems. To build a sustainable semiconductor ecosystem, national co-development centers are proposed across the country, each supporting research, skill-building, and pilot manufacturing.
The Indian Design, Semiconductors, Packaging and Systems Program (IDSPS Program) is a national R&D, educated-workforce and global supply-chain industry program with a critical mass team and infrastructure to build India from ground up in all strategic Design, Semiconductors, Packaging and Systems technologies to provide a sustainable path for manufacturing to grow the semiconductor industry for AI era.
Goals of IDSPS Program:
• Next Gen Strategic Designs & Technologies
• Next gen Educated - Workforce.
• Global Supply - chain partnership to design and demonstrate manufacturable technologies
Why IDSPS Program ?
While the initial ISM-subsidized manufacturing lines in Gujarat and Assam are based on legacy-node technologies, the rest of the advanced world is focusing on 2030 manufacturing technologies, such as optoelectronics for computing, compound semiconductors to form ultrahigh density integrated power modules for electric cars, glass panel chiplet packaging to 1 micron lithography in 3D chiplet architectures, and copper-to copper or hybrid bonding, and assembly, replacing solders, for AI era in view of slowdown of Moore’s Law. These are exactly the same technologies being developed in the IDSPS program to bring India to global level with a sustainable manufacturing path.


